概述

The Delta 100 is specifically designed for testing high performance CISC (complex instruction set computing) and RISC (reduced instruction set computing) microprocessors and the ICs that make up the chip sets that are used with them. The Delta 100 has resource-per-pin architecture and can test up to 512 pins at data rates of up to 100 MHz. Timing accuracy of 150 pico seconds is a significant improvement over the Deltamaster and Micromaster test systems.